1. Field of Invention
The present invention relates to a method for fabricating a semiconductor device. More particularly, the present invention relates to a method for fabricating metal silicide on polysilicon.
2. Description of Related Art
As the integration of semiconductor device increases, the pattern and the line width in the device gradually decrease. The contact resistance of the gate and the conductive line in the device thereby increases, leading to a higher RC delay and adversely affecting the operating speed. Since the resistance of metal silicide is lower than polysilicon and the thermal stability of metal silicide is higher than a typical inter-metal dielectric material, forming metal silicide on a gate can lower the resistance between the gate and the metal interconnect.
During the conventional fabrication method for metal silicide, after a polysilicon layer, for example, a gate, is formed on a semiconductor wafer and before the semiconductor wafer is subjected to a thermal process for forming metal silicide, the semiconductor wafer is, exposed to the environment for an extended period of time. A thin native oxide layer is grown on the polysilicon layer of the semiconductor wafer. Therefore, as the semiconductor wafer is being subjected to the thermal process for forming metal silicide, the adhesion between the metal silicide and the polysilicon layer is undesirable due to the presence of the native oxide layer. Metal silicide is easily peeled off the polysilicon layer, adversely affecting the reliability and the effectiveness of the device.